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The board numbers listed in t8122-jxxx.dtsi (J513, J515)
were used internally for M3 MacBook Air prototypes and
appear in leaks [0], however, no released product seems
to exist with them, with the M3 MacBook Air line instead
using J613 and J615 [1][2]. Thus, correct these numbers.

[0] https://9to5mac.com/2023/04/10/15-inch-macbook-air-panel
-production-reportedly-ramping-up-ahead-of-upcoming-launch/
[1] https://en.wikipedia.org/wiki/List_of_Apple_codenames
[2] My own personal testing on my 13-inch M3 MacBook Air

Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
In the Apple M3 (t8122) device tree:
- Add the following properties to each CPU node
	- operating-points-v2
	- capacity-dmips-mhz
	- performance-domains
- Add operating point tables for p-cores and e-cores
- Add cpufreq hardware controller nodes (for both
  p-cluster and e-cluster)

Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
Adds the System Management Contorller (SMC) to the Apple
M3 SoC (t8122) device tree, including the SMC mailbox and
the SMC itself, with GPIO and hwmon children.

Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
@noopwafel
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Thanks! This works for me, although I pushed an MTP SRAM address tweak to IntegralPilot#2 (which you need to see the RTKit log).

The internal keyboard and trackpad HID on MacBook variants
of the Apple M3 (t8122) SoC are connected through a Apple
-developed protocol called DockChannel and mediated by a
coprocessor known as the Multi-Touch Processor (MTP).

This commit adds the nessecary device tree nodes to the
M3's device tree for internal HID to work. It is disabled
by default, to be enabled only in MacBook board files
where it is tested and confirmed to work.

Co-developed-by: Alyssa Milburn <amilburn@zall.org>
Signed-off-by: Alyssa Milburn <amilburn@zall.org>
Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
On Apple Silicon, NVMe communication is mediated by a
coprocessor known as the ANS, and protected by its own
IOMMU known as the SART.

Add the following nodes to the M3 (t8122) device tree:
- Mailbox for the ANS coprocessor
- SART (IOMMU for the ANS coprocessor)
- The NVMe / ANS coprocessor itself

Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
Add a device tree for the Apple MacBook Air (13-inch, M3, 2024)
board variant of the M3 (t8122), known as J613.

It enables and configures the keyboard backlight and internal
HID nodes, as it is a laptop variant which has these devices.

Also add this new device tree to the Makefile, so it is built.

Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
@IntegralPilot IntegralPilot force-pushed the bits/001-devicetree-m3 branch from 9e5ae5f to f097126 Compare January 31, 2026 06:18
@IntegralPilot
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Thank you! I fixed the SRAM issue and added you as Co-developed-by for that commit, can see RTKit logs now.

noopwafel and others added 3 commits January 31, 2026 17:24
This only includes the first port, because it's the only port that is
present on my hardware, and only includes the pwren gpio for J613.

Uses the t6020 base compatible as that is what the M3 hardware appears
to be compatible with, rather than the configuration applied by the
generic base compatible.

Signed-off-by: Alyssa Milburn <amilburn@zall.org>
Co-developed-by: Michael Reeves <michael.reeves077@gmail.com>
Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
Apple Silicon Macs use two types of IOMMU, SART (for NVMe) and DART
(for everything else). On M3 (t8122), the SART is compatible with
the t6000 (M1 Pro/Max) one and the DART is compatible with the
t8110 (A15) one. Thus, add a t8122 enum variant to the compatibles,
but leave the base compatibles unchanged.

Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
The mailbox on M3 (t8122) is compatible with asc-mailbox-v4,
so add the t8122 compatible variant to enum section of the v4
mailbox section.

Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
@IntegralPilot IntegralPilot force-pushed the bits/001-devicetree-m3 branch from f097126 to e320a67 Compare January 31, 2026 06:24
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2 participants